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Who isDesign&Reuse?
Design&Reuse作為全球唯一獨(dú)立的專業(yè)IP搜索引擎，已經(jīng)走過了18個(gè)春秋。450個(gè)來自不同國家和地區(qū)的IP供應(yīng)商，選擇D&R作為他們與終端用戶溝通的橋梁與信息交換的重要渠道。其7X24小時(shí)在線的強(qiáng)勁引擎攜15,000個(gè)持續(xù)更新的IP產(chǎn)品，為世界各地35,000多位專業(yè)的注冊用戶提供無可匹敵的IP產(chǎn)品及供應(yīng)商資源。
Who is IP-SoC-Day?
D&R在全球范圍內(nèi)連續(xù)14年堅(jiān)持開展基于IP復(fù)用技術(shù)的專業(yè)技術(shù)大會，本活動于五年前登陸中國, 2015年9月15日在上海D&R將繼續(xù)為中國用戶及相關(guān)供應(yīng)商帶來IP-SoC-Day。海內(nèi)外優(yōu)秀IP供應(yīng)商與中國用戶將齊聚一堂進(jìn)行面對面交流，共同探討基于IP復(fù)用的芯片開發(fā)與設(shè)計(jì)技術(shù)發(fā)展與挑戰(zhàn)，及最新的IP技術(shù)進(jìn)展和其企業(yè)應(yīng)用。
Who are our partners?
本次大會與中芯國際SMIC的技術(shù)大會（上海2015年9月14日）緊密配合，并獲得了中國半導(dǎo)體協(xié)會ICCAD的大力支持，同時(shí)得到了二十多家國內(nèi)外優(yōu)秀半導(dǎo)體、IP廠商的積極響應(yīng)和近300位IC行業(yè)精英人士的熱情參與。
Where is the IP-SoC-Day?
地點(diǎn)：長榮桂冠酒店（上海）Evergreen Laurel Hotel (Shanghai)
上海市浦東新區(qū)祖沖之路1136號,近金科路NO. 1136, ZuChongZhiRoad, Pudong District, Shanghai 201203, China
時(shí)間：2015年9月15日 15th Sep. 2015
Agendaof IP-SoC-Day
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09:00 |
Welcome |
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09:05 |
Introdution by China Semiconductor Industry Association
By Mr. Wei |
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09:10 |
Triggering innovation in the design world: what are the Challenges? |
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09:25 |
Hongying Wu, Sr Director of Smics IP Alliance Program |
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09:40 |
The experiences, cautions and benefits of 16nm and 10nm fin-fet development |
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09:55 |
FD-SOI a New Era for Power Efficiency: Why and How? |
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10:10 |
Break |
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Session - From IP Solutions to SoC |
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10:30 |
Choosing the Optimal Display and Storage Interfaces to Meet Power and Cost Requirements of Mobile SoCs Synopsys |
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10:45 |
Cadence IP Solutions for Today's Vertical Markets |
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11:00 |
Title to be defined |
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11:15 |
Break |
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Session - IPs for Camera and Video |
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11:35 |
About Camera(CMOS Image Sensor) Interface IP |
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11:50 |
Key considerations when choosing your next generation video encoding IP |
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12:05 |
Standardized IP management & Delivery station for IP providers. Benefit from the unique 2015 D&R offering |
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12:20 |
Lunch |
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Session - Design Methodology on Advanced Nodes |
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14:00 |
The DELTA breakthrough: the standard for embedding power management systems |
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14:15 |
Evolutionary Challenges to Advanced Node Die Monitoring & Performance Optimisation |
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14:30 |
Supply Noise Induced Jitter - Don't Let it Kill Your Chip |
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14:45 |
Break |
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Session - Interface and Analog Design |
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15:00 |
High Performance Customizable DDR PHY |
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15:15 |
Communicate with high-speed ADCs and DACs using JESD204B SERDES |
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15:30 |
Development of High-speed SerDes IP |
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15:45 |
Break |
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Session - Internet of Things |
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16:00 |
IoT and Physical Design |
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16:15 |
Optimized IP That Will Drive Energy-Efficient IoT Designs |
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16:30 |
Panel: IoT a Myth or reality? What became real in the IoT world? |
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